400 µm Microvias | HDI | High Signal Density | Miniaturization | Sequential Build-Up (SBU) | Stackup Optimization

Extremely high currents on printed circuits require thicker copper cladding so that the induced heat-up of traces does not destroy the PCB. Although sometimes much thicker stack-ups are desired, we can implement two 400 µm copper layers into a standard PCB with 1,6 mm total thickness. So apart from a substantially heavier PCB the space requirements remain the same.

We use FR4 Tg 150°C material with a dielectric strength of around 3 kV per 100 µm. Other materials are possible in enquiry, as we keep 400 µm base copper on stock and can combine it with any material. Multiple etching runs are necessary to etch 400 µm PCBs. This leads to some layout restrictions. You can find the current limits on this technology in our rigid PCB technology section, as we continuously thrice to push the limits further.

One thing to consider during a 400 µm layout design is that the traces need to be much wider than usually. Commonly, traces need a base width that is factor 2 to 3 wider than its height. Otherwise, mechanical forces may break off the traces later on. For standard printed circuits with 35 µm final copper this means results in 70 µm to 105 µm structures as a common minimum and to 1,2 mm traces for 400 µm PCBs respectively. 

Furthermore, the distance between the traces has to be larger, so that the remaining copper can be etched down to the base material thoroughly. As you can see in the picture above the trace edges appear as rounded flanks due to multiple etch runs. This is also called "undercut". With around 250 µm per edge this is a reasonable result and will be compensated for during our CAM layout preparation. A 2 mm trace will therefore be enlarged to 2,5 mm prior to manufacturing. In order to compensate for the added width we require wider distances. For the current limits, please check the rigid PCB technologies table.